• 2006: Teranetics : Power optimization for 10GBASE-T processor using our proprietary techniques led to 25% lower power while increasing performance for 25%.
    • 2002: Intel Corp. : Consultancy on 802.11 chip realization.
    • 2001: Digital Archway Inc. : Complete encryption processor core design for a 10Gb network supporting: DES, 3DES, AES.
    • 1997-2001: SONY Corp. : Multi-media architecture core development. Architecture, performance evaluation, simulation, implementation.
    • 1999: BlueSteel Networks Inc. : Encryption processor core design, algorithm development (patent filed), simulation and verification.
      (acquired by Broadcom)
    • 1998-99: BOPS Inc. : Processor core design, implementation and verification for ManArray processor. Design includes a complex media processor, floating-point processor and divide/square unit.
      (acquired by Altera Corp)
    • 1997: Hewlett-Packard Labs : short course in low-power design.
    • 1996: Hewlett-Packard Labs : short course in advanced logic design.
    • 1996-97: Siemens Corp. : Development of a high performance processor – combination of RISC and DSP in an embedded logic and memory technology using Siemens, IBM, Toshiba advanced DRAM process. Responsibility for the architecture (management of the architecture team), design and circuit macros for a multi-media (MMX) type of data-path environment (Siemens TriCore uProcessor).
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