INDUSTRY

PATENTS

PUBLICATIONS

PRESENTATIONS

2003-on__
2000-2002
1997-1999
1995-1996
1990-1994
1973-1989

99. D. Markovic, B. Nikolic, V.G. Oklobdzija, "General Method in Synthesis of Pass-Transistor Circuits", 22nd International IEEE Conference on Microelectronics, May, 2000, Nis, Yugoslavia.
    


100. B. Nikolic, V. G. Oklobdzija, V. Stojanovic, W. Jia, J. Chiu, M. Leung, "Improved Sense Amplifier-Based Flip-Flop: Design and Measurements", IEEE Journal of Solid-State Circuits, Vol. 35, No. 6, June 2000.
     


101. V. G. Oklobdzija, A. A. Farooqui, "Computer Arithmetic for the Processing of Media Signals", Invited Paper, Proceedings of SPIE Vol. 4116, Advanced Signal Processing Algorithms, Architectures, and Implementations, San Diego, California, USA, 2 -4 August, 2000.
     


102. D. Maksimovic, V. G. Oklobdzija, B. Nikolic, K. W. Current, "Clocked CMOS Adiabatic Logic with Integrated Single-Phase Power-Clock Supply", IEEE Transactions on VLSI Systems, Vol. 8, No. 4, August 2000.
     


103. A. Farooqui, K. W. Current, V. G. Oklobdzija, "Partitioned Branch Condition Resolution Logic", Proceedings of the Symposium on Integrated Circuits and Systems Design, SBCCI2000, Manaus, Brazil, September 18-22, 2000.
     


104. N. Nedovic, V. G. Oklobdzija, "Hybrid Latch Flip-Flop with Improved Power Efficiency", Proceedings of the Symposium on Integrated Circuits and Systems Design, SBCCI2000, Manaus, Brazil, September 18-22, 2000.
     


105. N. Nedovic, V. G. Oklobdzija, "Dynamic Flip-Flop with Improved Power", Proceedings of the 26th European Solid-State Circuits Conference, ESSCIRC 2000, Stockholm, Sweden, September 19-21, 2000.
     


106. N. Nedovic, V. G. Oklobdzija, "Dynamic Flip-Flop with Improved Power", Proceedings of the International Conference on Computer Design, ICCD 2000, Austin, Texas, September 18-20, 2000.
     


107. A. Farooqui, V. G. Oklobdzija, "Impact of Architecture Extensions for Media Signal Processing on Data-Path Organization", 34th Annual Asilomar Conference on signals, Systems and Computers, Pacific Grove, California, October 29 - November 1, 2000.
     


108. A. Farooqui, V. G. Oklobdzija, "A Programmable Data-Path for MPEG-4 and Natural Hybrid Video Coding", 34th Annual Asilomar Conference on signals, Systems and Computers, Pacific Grove, California, October 29 - November 1, 2000.
     


109. V. G. Oklobdzija, "Computational Requirements for Media Signal Processing", 34th Annual Asilomar Conference on signals, Systems and Computers, Pacific Grove, California, October 29 - November 1, 2000.
     


110. D. Markovic, B. Nikolic, V.G. Oklobdzija, "General Method in Synthesis of Pass-Transistor Circuits", Microelectronics Journal, Elsevier Science Publishing, No. 31, November-December, 2000, p.991-998.
     


111. A. Inoue, V. G. Oklobdzija, W. W. Walker, M. Kai, T. Izawa, "A Low Power SOI Adder Using Reduced-Swing Charge Recycling Circuits", 2001 IEEE International Solid-State Circuits Conference Digest of Technical papers, San Francisco, February 2001.
     


112. N. Nedovic, V. G. Oklobdzija, M. Leung, "FIR Filter for Adaptive Equalization in PRML Read Channels", The 5th World Multi-Conference on Systemics, Cybernetics and Informatics SCI 2001, Orlando, Florida, July 22-25, 2001.
     


113. H. Q. Dao, K. Nowka, V. G. Oklobdzija, "Analysis of Clocked Timing Elements for DVS Effects over Process Parameter Variation", Proceedings of the International Symposium on Low Power Electronics and Design, Huntington Beach, California, August 6-7, 2001.
     


114. N. Nedovic, M. Aleksic, V. G. Oklobdzija, "Conditional Techniques for Low Power Consumption Flip-Flops", Proceedings of the 8th IEEE International Conference on Electronics, Circuits and Systems, Malta, September 2-5, 2001.
     


115. N. Nedovic, M. Aleksic, V. G. Oklobdzija, "Timing Characterization of Dual-Edge Triggered Flip-Flops", Proceedings of the International Conference on Computer Design, ICCD 2001, Austin, Texas, September 23-26, 2001.
     


116. H. Q. Dao, V. G. Oklobdzija, "Application of Logical Effort on Delay Analysis of 64-bit Static Carry-Lookahead Adder", 35th Annual Asilomar Conference on Signals, Systems and Computers, Pacific Grove, California, November 4-7, 2001.
     


117. X. Y. Yu, V. G. Oklobdzija, W. W. Walker, "Application of Logical Effort on Design of Arithmetic Blocks", 35th Annual Asilomar Conference on Signals, Systems and Computers, Pacific Grove, California, November 4-7, 2001.
     


118. H. Q. Dao, V. G. Oklobdzija, "Application of Logical Effort Techniques for Speed Optimization and Analysis of Representative Adders", 35th Annual Asilomar Conference on Signals, Systems and Computers, Pacific Grove, California, November 4-7, 2001.
     


119. C. Cuche, C. Piguet, V. G. Oklobdzija, "Design Flow and CAD Tools for Asynchronous Design of Sequential Library Cells", Second Working Group on Asynchronous Circuit Design (ACiD-WG) Workshop of the European Commission's Fifth Framework Programme, Munich, Germany, 28-29 January, 2002.
     


120. M. Saint-Laurent, V. G. Oklobdzija, S. S. Singh, M. Swaminathan, J. D. Meindl, "Optimal Sequencing Energy Allocation for CMOS Integrated Systems", 3rd International Symposium on Quality Electronic Design, San Jose, California, March 18-20, 2002.
     


121. V. G. Oklobdzija, "Clocking in Multi-GHz Environment", 2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595). IEEE. Part vol.2, 2002, pp. 561-8 vol.2. Piscataway, NJ, USA.
     


122. V. G. Oklobdzija, "Clocking in Multi-GHz Environment", Electrical Engineering Series, Facta Universitatis, Nis, Vol. 15, No. 1. April 2002. (reprint from 23rd International Conference on Microelectronics. Proceedings, 2002)
     


123. N. Nedovic, M. Aleksic, V. G. Oklobdzija, "Comparative Analysis of Double-Edge versus Single-Edge Triggered Clocked Storage Elements", 2002 IEEE International Symposium on Circuits and Systems, Scottsdale, Arizona, May 26-29, 2002.
     


124. N. Nedovic, M. Aleksic, V. G. Oklobdzija, "Conditional Pre-Charge Techniques for Power-Efficient Dual-Edge Clocking", Proceedings of the International Symposium on Low-Power Electronics and Design, Monterey, California, August 12-14, 2002.
     


125. V. G. Oklobdzija, J. Sparso, "Future Directions in Clocking Multi-GHz Systems", ISLPED'02: Proceedings of the 2002 International Symposium on Lower Power Electronics and Design (IEEE Cat. No.02TH8643). ACM. 2002, pp. 219. New York, NY, USA.
     


126. H. Q. Dao, V. G. Oklobdzija, "Performance Comparison of VLSI Adders Using Logical Effort", 12^th International Workshop on Power And Timing Modeling, Optimization and Simulation, Sevilla, SPAIN, September 11-13, 2002.
     


127. V. G. Oklobdzija, "Clocking and Clocked Storage Elements in Multi-GHz Environment", Invited paper, 12^th International Workshop on Power And Timing Modeling, Optimization and Simulation, Sevilla, SPAIN, September 11-13, 2002.
     


128. N. Nedovic, W. W. Walker, V. G. Oklobdzija, M. Aleksic, "A Low Power Symmetrically Pulsed Dual Edge-Triggered Flip-Flop", Proceedings of the 28^th European Solid-State Circuits Conference, Florence, ITALY, September 24-26, 2002.