INDUSTRY

PATENTS

PUBLICATIONS

PRESENTATIONS

2003-on__
2000-2002
1997-1999
1995-1996
1990-1994
1973-1989

70. V. G. Oklobdzija, Comments on "Leading-Zero Anticipatory Logic for High-Speed Floating Point Addition", IEEE Journal of Solid-State Circuits, Vol. 32, No. 2, pp. 292-293, February 1997.
    


71. P. Stelling, V. G. Oklobdzija, "Implementing Multiply-Accumulate Operation in Multiplication Time", Thirteenth International Symposium on Computer Arithmetic, Pacific Grove, California, July 5 - 9, 1997.
    


72. D. Maksimivic, V. G. Oklobdzija, B. Nikolic, K. W. Current, "Design and Experimental Verification of a CMOS Adiabatic Logic with Single-Phase Power-Clock Supply", Proceedings of the 40th Midwest Symposium on Circuits and Systems, Sacramento, California, August 3-6, 1997.
    


73. D. Maksimovic, V. G. Oklobdzija, B. Nikolic, K. W. Current, "Clocked CMOS Adiabatic Logic with Integrated Single-Phase Power-Clock Supply: Experimental Results", International Symposium on Low Power Electronics and Design, Monterey, California, August 18-20, 1997.
    


74. Paul F. Stelling and Vojin G. Oklobdzija, "Optimal Designs for Multipliers and Multiply-Accumulators", Proceedings of the 15th IMACS World Congress on Scientific Computation, Modeling, and Applied Mathematics, Volume 4 Artificial Intelligence and Computer Science, Achim Sydow, editor, Wissenschaft and Technik Verlag, Berlin, August 1997, pp. 739-744.
    


75. B. Nikolic, V. G. Oklobdzija, "A Single-Phase Clock High-Performance BiCMOS Latch", Proceedings of the 7th International Symposium on IC Technology, Systems & Applications, Singapore, September 10-12, 1997.
    


76. K. W. Current, V. G. Oklobdzija, D. Maksimovic, "On Adiabatic Multiple Valued Logic Circuits", Journal of Multiple Value Logic, Vol. 2, Gordon and Breach Publishing, pp. 329-347, 1997.
    


77. V. G. Oklobdzija, "Differential and Pass-Transistor CMOS Logic for High-Performance Systems", 21st International IEEE Conference on Microelectronics, September 14-17, 1997, Nis, Yugoslavia.
    


78. V. G. Oklobdzija, D. Maksimovic, F. C. Lin, "Pass-Transistor Adiabatic Logic using Single Power-Clock Supply", IEEE Transactions on Circuits and Systems-II, Vol. 44, No. 10, pp. 842-846. October 1997.
    


79. V. G. Oklobdzija and B. Duchene, "Synthesis Of High-Speed Pass-Transistor Logic", IEEE Transactions on Circuits and Systems-II, Vol. 44, No. 11, November 1997, 7 pages.
    


80. V. G. Oklobdzija, "Differential and Pass-Transistor CMOS Logic for High-Performance Systems", reprinted from 21st International IEEE Conference on Microelectronics, Electronics, Vol. 1, No. 1, December 1997.
    


81. V. G. Oklobdzija, "Differential and Pass-Transistor CMOS Logic for High-Performance Systems", Microelectronics Journal, Elsevier Publishing,  March 1998.
    


82. P. Stelling, C. Martel, V. G. Oklobdzija, R. Ravi, "Optimal Circuits For Parallel Multipliers", IEEE Transactions on Computers, Vol. 47, No. 3, pp. 273-285, March 98.
    


83. A. A. Farooqui, V. G. Oklobdzija, "General Data-Path Organization of a MAC unit for VLSI Implementation of DSP Processors", 1998 IEEE International Symposium on Circuits and Systems, Monterey, California, May 31 - June 3, 1998.
    


84. B. Nikolic, V. G. Oklobdzija, "Low Voltage BiCMOS TSPC Latch for High Performance Digital Systems", 1998 IEEE International Symposium on Circuits and Systems, May 31 - June 3, 1998, Monterey, California.
    


85. V. G. Oklobdzija, "Architectural Tradeoffs for Low Power", International Symposium on Computer Architecture, Barcelona, SPAIN, June 27-July 1st, 1998.
    


86. V. Stojanovic, V. G. Oklobdzija, R. Bajwa, "A Unified Approach in the Analysis of Latches and Flip-Flops for Low-Power Systems", International Symposium on Low Power Electronics and Design, Monterey, California, August 10-12, 1998.
    


87. V. Stojanovic, V. G. Oklobdzija, R. Bajwa, "Comparative Analysis of Latches and Flip-Flops for High-Performance Systems", International Conference on Computer Design, Austin, Texas, October 5-7, 1998.
    


88. A. A. Farooqui, V. G. Oklobdzija, "Early Branch Prediction Circuit For High Performance Digital Signal Processors", 1998 IEEE Conference on Microelectronics, Monastir, Tunisia, December 14-16, 1998.
    


89. B. Nikolic, V. Stojanovic, V.G. Oklobdzija, W. Jia, J. Chiu, M. Leung, "Sense Amplifier-Based Flip-Flop", 1999 IEEE International Solid-State Circuits Conference, San Francisco, February 1999.
    


90. V. Stojanovic and V. G. Oklobdzija, "Comaparative Analysis of Master-Slave Latches and Flip-Flops for High-Performance and Low-Power Systems", IEEE Journal of Solid-State Circuits, Vol. 34, No. 4, April 1999.
    


91. V. G. Oklobdzija, "Digital Arithmetic", Wiley Encyclopedia of Electrical and Electronics Engineering, Vol. 5, Book Chapter, John Wiley publishing, 1999.
    


92. V. G. Oklobdzija, "Reduced Instruction Set Computing", Wiley Encyclopedia of Electrical and Electronics Engineering, Vol. 18, Book Chapter, John Wiley publishing, 1999.
    


93. A. Farooqui, V. G. Oklobdzija, "VLSI Implementation of Early Branch Prediction Circuits for High Performance Computing", 9th Great Lakes VLSI conference (GLSVLSI 99), Ann Arbor, Michigan, March 4-6, 1999.
    


94. A. Farooqui, V. G. Oklobdzija, F. Chehrazi, "64-Bit Media Adder", 1999 IEEE International Symposium on Circuits and Systems, Orlando, Florida, May 5-8, 1999.
    


95. A. Farooqui, V. G. Oklobdzija, F. Chehrazi, "Multiplexer Based Adder for Media Signal Processing", 1999 International Symposium on VLSI Technology, Systems, and Applications, Taipei, Taiwan, June 8-10, 1999.
    


96. B. Nikolic, V. G. Oklobdzija, "Design and Optimization of Sense Amplifier-Based Flip-Flops", 25th European Solid-State Circuits Conference, Duisburg, GERMANY, 21-23 September 1999.
    


97. F. Chehrazi, V. G. Oklobdzija, A. A. Farooqui, "Single-Cycle Throughput Multi-Media Multiplier", SONY Research Forum (SRF), Tokyo, JAPAN, October 1999.
    


98. B. Nikolic, M. Leung, L. Fu, V.G. Oklobdzija, R. Yamasaki, "Reduced-Complexity Sequence Detection for E²PR4 Magnetic Recording Channel", Proceedings of Global Telecommunications Conference, Globcom '99, Rio de Janeiro, BRAZIL, December 1999.