INDUSTRY

PATENTS

PUBLICATIONS

PRESENTATIONS

2003-on__
2000-2002
1997-1999
1995-1996
1990-1994
1973-1989

22. B. D. Lee and V. G. Oklobdzija, "Optimization And Speed Improvement Analysis Of Carry-Lookahead Adder Structure", Proceedings of the 24th Asilomar Conference on Signals, Systems and Computers, Vol. 2 of 2, pp. 918-922, 1990.
    


23. P. K. Chan, M. D. F. Schlag, C. D. Thomborson and V. G. Oklobdzija, "Delay Optimization Of Carry-Skip Adders And Block Carry-Lookahead Adders", Proceedings of the 10th IEEE Symposium on Computer Arithmetic, ARITH-10, pp. 1-11, 1991.
    


24. B. D. Lee and V. G. Oklobdzija, "Improved CLA Scheme With Optimized Delay", Journal of VLSI Signal Processing, Vol. 3, No. 4, pp. 265-274, 1991.
    


25. A. Sah, D. C. Verma and V. G. Oklobdzija, "A Study Of I/O Architecture For High Performance Next Generation Computers", Proceedings of the 2nd Symposium on High Performance Computing, pp. 1-12, 1991.
    


26. N. M. Marinovic and V. G. Oklobdzija, "VLSI Chip Architecture For Real-Time Ambiguity Function Computation", Proceedings of the 25th Asilomar Conference on Signals, Systems and Computers, 1991, 5 pages.
    


27. P. K. Chan, M. D. Schlag, C. D. Thomborson and V. G. Oklobdzija, "Delay Optimization Of Carry-Skip Adders And Block Carry-Lookahead Adders Using Multidimensional Dynamic Programming", IEEE Transactions on Computers, Vol. 41, No. 8, pp. 920-930, 1992.
    


28. V. G. Oklobdzija, "An Implementation Algorithm And Design Of A Novel Leading Zero Detector Circuit", 26th IEEE Asilomar Conference on Signals, Systems and Computers, Vol 1, pp. 391-395, 1992. (Invited paper)
    


29. V. G. Oklobdzija, D. Villeger, and T. Soulas, "Considerations For Design Of A Complex Multiplier", 26th IEEE Asilomar Conference on Signals, Systems and Computers, Asilomar, Vol. 1, pp. 366-370, 1992. (Invited paper)
    


30. V. G. Oklobdzija, "Algorithmic Design Of A Hierarchical And Modular Leading Zero Detector Circuit", Electronics Letters, Vol. 29, No. 3, pp. 283-284, 1992.
    


31. T. Soulas, D. Villeger and V. G. Oklobdzija, "An ASIC Macro Cell Multiplier For Complex Numbers", Proceedings of EURO-ASIC-93, the European (EDAC) Conference in ASIC Design, 1993, 5 pages.
    


32. V. G. Oklobdzija, "Computer Arithmetic", The Electrical Engineering Handbook, R. C. Dorf (Ed.), a Chapter, CRC Press, Inc., pp. 1858-1865, 1993.
    


33. V. G. Oklobdzija and D. Villeger, "Multiplier Design Utilizing Improved Column Compression Tree And Optimized Final Adder In CMOS Technology", Proceedings of the 1993 International Symposium on VLSI Technology, Systems and Applications, pp. 209-212, 1993.
    


34. V. G. Oklobdzija, "A Hierarchical And Modular Circuit Implementing Leading Zero Detector For A High-Performance Floating-Point Processor", Proceedings of the 5th International Symposium on IC Technology, Systems, and Applications, ISIC-93, Nanyang Technological University, Singapore, 1993, 2 pages.
    


35. V. G. Oklobdzija, D. Villeger, and T. Soulas, "An Integrated Multiplier For Complex Numbers", Journal of VLSI Signal Processing, Vol. 7, No. 3, pp. 213-222, 1993.
    


36. V. G. Oklobdzija, "An Algoritmic And Novel Design Of A Leading Zero Detector Circuit: Comparison With Logic Synthesis", IEEE Transactions on VLSI Systems, Vol. 2, No. 1, pp. 124-128, 1993.
    


37. D. Villeger and V. G. Oklobdzija, "Analysis Of Booth Encoding Efficiency In Parallel Multipliers Using Compressors For Reduction Of Partial Products", Proceedings of the 27th Asilomar Conference on Signals, Systems and Computers, pp. 781-784, 1993.
    


38. D. Villeger and V. G. Oklobdzija, "Evaluation Of Booth Encoding Techniques For Parallel Multiplier Implementation", Electronics Letters, Vol. 29, No. 23, pp. 2016-2017, 1993.
    


39. V. G. Oklobdzija, "New ECL Gate In BiFET Process", Electronics Letters, Vol. 29, No. 23, pp. 2029-2030, 1993.
    


40. M. Q. Le and V. G. Oklobdzija, "Logic Synthesis For ASIC: A Guided Algorithmic Approach", Proceedings of the 1994 International Conference on ASIC, 1994, 4 pages.
    


41. A. de la Serna, M. A. Soderstrand and V. G. Oklobdzija, "System For Rapid Prototyping Of Application Specific Signal Processors For ASIC Implementation", Proceedings of the 1994 International Conference on ASIC Implementation, pp. 157-160, 1994.
    


42. R. Hundal and V. G. Oklobdzija, "Determination Of Optimal Sizes For A First And Second Level SRAM-DRAM On-Chip Cache Combination", Proceedings of the 1994 International Conference on Computer Design, 1994, 5 pages.
    


43. V. G. Oklobdzija, "An ECL Gate With Improved Speed And Low Power In BiCMOS Process", Proceedings of the 1994 Bipolar/BiCMOS Circuits and Technology Meeting, 1994, 4 pages.
    


44. V. G. Oklobdzija, "Design And Analysis Of Fast Carry-Propagate Adder Under Non-Equal Input Signal Arrival Profile", Proceedings of the 28th Asilomar Conference on Signals, Systems and Computers, 1994, 4 pages.
    


45. R. H. Strandberg, J. C. Le Duc, Z-Y. Yang, L. G. Bustamante, V. G. Oklobdzija and M. Soderstrand, "Reconfigurable Processor For Real-Time Adaptive Sample Rate Notch Filtering", Proceedings of the 28th Asilomar Conference on Signals, Systems and Computers, 1994, 4 pages.
    


46. R. H. Strandberg, J. C. Le Duc, L. G. Bustamante, V. G. Oklobdzija, and M. Soderstrand, "Implementation Of Adapative Sample Rate Kwan-Martin Notch Filter Using Efficient Realizations Of Reciprocal And Squaring Circuit", Proceedings of the 28th Asilomar Conference on Signals, Systems and Computers, 1994, 5 pages.