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PRESENTATIONS
(1996-1999)
- 1996 ADVANCED LOGIC DESIGN: METHODOLOGY AND CIRCUIT TECHNIQUES, series of lectures, Hewlett-Packard Laboratories, Palo Alto , February-April, 1996.
- 1996 ADVANCED LOGIC DESIGN: METHODOLOGY AND CIRCUIT TECHNIQUES, series of lectures, Fudan University, Shanghai , P.R. CHINA, April 22-26, 1996.
- 1996 LA HISTORIA DEL DESARROYO DE SYSTEMAS DE COMPUTACION Y LA PROYECTION POR EL FUTURO, Universidad San Francisco Xavier de Chuquisaca , Sucre, BOLIVIA, September 24, 1996.
- 1997 MODERN MICROPROCESSOR ARCHITECTURES, Intel Corporation, Beaverton, Oregon, January 27, 1997.
- 1997 MODERN MICROPROCESSOR ARCHITECTURES, Digital Equipment Corporation, Hudson, Massachusetts, January 31, 1997.
- 1997 MODERN MICROPROCESSOR ARCHITECTURES: Evolution of RISC into Super-Scalars, Tutorial given at the International Solid-State Circuits Conference, San Francisco, California, February 5, 1997.
- 1997 Algorithm for efficient implementation of fast parallel multipliers, Seminar given at Silicon Graphics Incorporated, Mountain View, California, February 19, 1997.
- 1997 Develpment of fast VLSI data-pahts, Compass Design Automation, San Jose, California, March 5, 1997.
- 1997 algorithms for generation of high-speed data-path compilers, Cascade Design Automation, Bellevue, Washington, March 13, 1997.
- 1997 mapping of algorithms into technology: high-speed data-path implementation, LSI Logic Corporation, Milpitas, California, April 7, 1997.
- 1997 Low-Power Design Techniques in VLSI Systems, Seminar at Hewlett-Packard Company Internal Workshop, Monterey, California, May 27, 1997.
- 1997 adiabatic techniques for achieving low-power: experimental results, Tokyo University, Tokyo, JAPAN, June 10, 1997.
- 1997 clocking methodology and latch design techniques for low-power processors, Hitachi Central Research Laboratories, Kokubunji, Tokyo, JAPAN, June 16, 1997.
- 1997 modern microprocessor architectures: Development that lead to super-scalar implementations, SONY Corporate Headquarters, Tokyo, JAPAN, June 17, 1997.
- 1997 Impact of multi-media computing on computer arithmetic: is there a need for STANDARDISATION?, Panel Presentation, 13th International Symposium on Computer Arithmetic, Asilomar, California, July 8, 1997.
- 1997 Differential and Pass-Transistor CMOS Logic for High-Performance Systems, 21st International IEEE Conference on Microelectronics, September 15-17, 1997, Nis, Yugoslavia.
- 1997 AN APPLICATION OF DYNAMIC PROGRAMMING TO THE DESIGN OF A FAST ARITHMETIC LOGIC UNIT, AT&T Seminar Series, Department of Industrial Engineering, Georgia Institute of Technology, Atlanta, Georgia, October 6, 1997.
- 1998 COMPARATIVE STUDY OF THE ADVANCED LATCHES AND FLIP-FLOPS FOR HIGH-PERFORMANCE AND LOW-POWER VLSI SYSTEMS, Sun Microsystems Laboratories, Sunnyvale, California, February 26, 1998.
- 1998 ADVANCED LATCHES AND FLIP-FLOPS FOR HIGH-PERFORMANCE AND LOW-POWER VLSI SYSTEMS, Internal Symposium on Low Power Design, Micro-Computer Research Laboratories, Intel Corporation, Hillsboro, Oregon, February 10, 1998.
- 1998 VLSI ARITHMETIC FOR LOW-POWER VLSI SYSTEMS, Internal Symposium on Low Power Design, Micro-Computer Research Laboratories, Intel Corporation, Hillsboro, Oregon, February 10, 1998.
- 1998 SUPER-SCALAR PROCESSOR ARCHITECTURE, Center for Integrated Systems, Korea Advanced Institute of Science and Technology - KAIST, Taejon, KOREA, May 22, 1998.
- 1998 SUPER-SCALAR PROCESSOR ARCHITECTURE, Seoul National University, Seoul, KOREA May 25, 1998.
- 1998 ARCHITECTURAL TRADEOFFS FOR LOW POWER, The 25th Annual International Symposium on Computer Architecture - ISCA, Barcelona, SPAIN June 28, 1998.
- 1999 ADVANCED LATCHES AND FLIP-FLOPS FOR HIGH-PERFORMANCE AND LOW-POWER VLSI SYSTEMS, Computer Elements Workshop, Mesa Arizona, January 18, 1999.
- 1999 ARITHMETIC UNITS FOR DSP AND MEDIA SIGNAL PROCESSING, MEAD DSP course, Monterey, March 9, 1999.
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