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PRESENTATIONS
(1994-1995)
- 1994 TECHNOLOGY UNDER CONTROL: ETHICS AND RESPONSIBILITY OF AN ENGINEER, Society of Women in Engineering, School of Engineering, University of California, Davis, California, February 2, 1994.
- 1994 DEVELOPMENT OF RISC ARCHITECTURE: AN INSIDER'S UNORTHODOX PERSPECTIVE, IEEE Seminar, School of Engineering, University of California, Davis, California, February 23, 1994.
- 1994 A METHOD FOR GENERATION OF FAST PARALLEL MULTIPLIERS, Computer Engineering Seminar, Department of Electrical Engineering, University of California, Davis, California, May 17, 1994.
- 1994 A METHOD FOR GENERATION OF FAST PARALLEL MULTIPLIERS, Seminar, Research and Development Department, Hitachi America Ltd., Brisbane, California, May 27, 1994.
- 1994 ON TESTABILITY OF PASS-TRANSISTOR LOGIC, Seminar, Research and Development Department, Hitachi America Ltd., Brisbane, California, May 27, 1994.
- 1994 AN ECL GATE FOR HIGH-SPEED AND LOW-POWER LOGIC IN BICOMOS PROCESS. Presented at the High Speed Electronics Research Department, AT&T Bell Laboratories, Homdel, New Jersey, July 21st, 1994.
- 1994 ADIABATIC CIRCUITS FOR LOW POWER COMPUTATION. Electrical Engineering Department, Imperial College, London, England, July 26th, 1994.
- 1994 ADIABATIC LOGIC AND LOW ENERGY COMPUTATION. Seminar at NEC USA C&C Research Laboratories, Princeton, New Jersey, August 10, 1994.
- 1994 USE OF ADIABATIC LOGIC FOR LOW ENERGY COMPUTATION. Seminar. Department of Electrical Engineering, Princeton University, August 10, 1994.
- 1994 PROGRESS IN DEVELOPMENT OF ADIABATIC CIRCUITS AND LOGIC. Seminar, VLSI Research Department, AT&T Bell Laboratories, August 19, 1994.
- 1994 THE OUTLOOK FOR DEVELOPMENT OF COMPUTING AND DIGITAL SYSTEMS IN THE NEXT DECADE. Invited Distinguished Lecture, Department of Electrical Engineering, University of Belgrade, Yugoslavia, September 26, 1994.
- 1994 LOGIC SYNTHESIS FOR ASIC. Invited Lecture, Institute of Automation, Chinese Academy of Science, Beijing, P. R. of China, October 18, 1994.
- 1994 DEVELOPMENT AND SYNTHESIS OF DUAL VALVE LOGIC USING PASS TRANSISTOR DESIGN TECHNIQUE. Invited Lecture, Insititute of Microelectronics, Chinese Academy of Science, Beijing, P. R. of China, October 18, 1994.
- 1994 LOGIC SYNTHESIS USING GUIDED ALGORITHMIC APPROACH. Invited Lecture, Department of Electrical Engineering, Tsinghua University, Beijing, P. R. of China, October 19, 1994.
- 1994 LOGIC SYNTHESIS FOR ASIC: A GUIDED ALGORITHMIC APPROACH. First International Conference on ASIC, Fragrant Hill, Beijing, P. R. of China, October 20, 1994.
- 1994 SYSTEM FOR RAPID PROTOTYPING OF APPLICATION SPECIFIC SIGNAL PROCESSORS FOR ASIC IMPLEMENTATION. First International Conference of ASIC, Fragrant Hill, Beijing, P. R. of China, October 20, 1994.
- 1994 A METHOD FOR GENERATION OF SPEED OPTIMIZED PARALLEL MULTIPLIER. Special Seminar, Hitachi Central Research Laboratory, Kokubunji, Tokyo, JAPAN, October 24, 1994.
- 1995 Performance Issues in Super-Scalar RISC Processors: Value of Register Renaming Algorithm, Seminar at San Francisco State University, San Francisco, California, March 11, 1995.
- 1995 RE-ENGINERIA DE SISTEMAS DE INFORMACION PARA LOS ANOS 90, 1st International Conference on System Engineering, Lima, PERU, June 1st, 1995 (in Spanish).
- 1995 SISTEMAS DE INFORMACION: ARQUITECTURA DE SISTEMAS MODERNOS, 1st International Conference on System Engineering, Lima, PERU, June 1-2, 1995 (two day workshop in Spanish).
- 1995 OPTIMAL STRATEGIES FOR PARALLEL MULTIPLIER DESIGN, Electrical Engineering Department, University of Belgrade, Yugoslavia, July 28, 1995.
- 1995 New Differential Logic based on pass-Transistor design, Electrical Engineering Department, University of Belgrade, Yugoslavia, September 14, 1995.
- 1995 Algorithm and method for synthesis of fast parallel multiplier, Electrical Engineering Department, University of Belgrade, Yugoslavia, September 15, 1995.
- 1995 A PERSPECTIVE ON NEW GENERATION OF SUPER-SCALAR RISC PROCESSORS, Honywell-Bull Group User Seminar, Budva, Yugoslavia, September 21, 1995.
- 1995 New Differential Logic based on pass-Transistor design, Ecole Superieure d'Ingenieurs en Electrotechnique et Electronique, Noisy le Grand , FRANCE, September 26, 1995.
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