INDUSTRY

PATENTS

PUBLICATIONS

PRESENTATIONS

2003-on__
2002-____
2000-2001
1996-1999
1994-1995
1990-1993
1982-1989

1. 1982 VLSI TECHNOLOGY. Electrical Engineering Department, University of Belgrade, Yugoslavia, September 18, 1982.
   


2. 1982 TESTABILITY ENHANCEMENT OF VLSI USING CIRCUIT STRUCTURES. Presented at the ICCC '81 IEEE International Conference on Circuits and Computers, New York, NY, September 28 - October 1, 1982.
   


3. 1983 IMPROVING TESTABILITY BY USING ADDITIONAL CIRCUITS. Presented at the Seventeenth Asilomar Conference on Circuits, Systems and Computers, Pacific Grove, CA, October 31 - November 2, 1983.
   


4. 1984 ON TESTABILITY OF CVS LOGIC. Presented at IBM Internal Technical Liaison Symposium, La Grande, France, April 3-5, 1989.
   


5. 1984 TEST GENERATION FOR FET SWITCHING CIRCUITS. Presented at the Internal Test Conference, Philadelphia, PA, October 16-18, 1984.
   


6. 1984 ON TESTABILITY OF CMOS-DOMINO LOGIC. Presented at the 14th International Symposium on Fault Tolerant Computing, Orlando, FL, June 20-22, 1984.
   


7. 1985 SOME OPTIMAL SCHEMES FOR ALU IMPLEMENTATION IN VLSI TECHNOLOGY. Presented at the 7th Symposium on Computer Arithmetic, Urbana, IL.
   


8. 1985 DESIGN-PERFORMANCE TRADE-OFFS IN CMOS-DOMINO LOGIC. Presented at the Custom Integrated Circuits Conference, Portland, Or, May 22, 1985.
   


9. 1986 ALGORITHM FOR IMPLEMENTATION OF A FAST AND OPTIMAL ALU IN VLSI TECHNOLOGY. Computer Science Department, University of California at Los Angeles, Los Angeles, California, February 18, 1986.
   


10. 1986 DESIGN TRADE-OFFS IN VLSI TECHNOLOGY. Electrical Engineering Department, Columbia University, New York, N.Y., March 7, 1986.
    


11. 1986 TESTABILITY OF DYNAMIC CMOS CIRCUITS. Fifth IEEE West Coast Workshop, Lake Tahoe, California, April 20-23, 1986.
    


12. 1986 REDUCED INSTRUCTION SET ARCHITECTURES FOR VLSI IMPLEMENTATION. Electrical Engineering Department, University of Belgrade, Yugoslavia, September 9, 1986.
    


13. 1987 SINGLE-CHIP ARCHITECTURE FOR REAL-TIME COMPUTATION OF THE WIGNER DISTRIBUTION OF ACOUSTIC SIGNALS. Presented at the 21st Asilomar Conference on Signals, Systems, and Computers, November 2-4, Pacific Grove.
    


14. 1988 ARCHITECTURAL STUDY OF AN INTEGRATED FIXED AND FLOATING POINT VLSI-ASIC PROCESSOR. University of California Irvine, Irvine, California, March 23, 1988.
    


15. 1988 EFFICIENT VLSI ALGORITHM FOR FAST ALU IMPLEMENTATION. Department of Computer Engineering, University of California, Santa Cruz, November 17, 1988.
    


16. 1988 ARCHITECTURE FOR SINGLE-CHIP ASIC PROCESSOR WITH INTEGRATED FLOATING POINT UNIT. Presented at the 21st Hawaii International Conference on System Sciences, Kailua-Kona, Hawaii, January 5-7, 1988.
    


17. 1988 ARCHITECTURAL STUDY FOR AN INTEGRATED FIXED AND FLOATING-POINT VLSI-ASIC PROCESSOR. Presented at COMPEURO-'88. Symposium on Circuits and Systems, Brussels, April 11-14, 1988.
    


18. 1989 EFFICIENT VLSI IMPLEMENTATION OF ADDITION. University of San Diego, San Diego, California, February 23, 1989.
    


19. 1989 801: A PERSPECTIVE ON IBM RISC. Electrical Engineering Department, Stanford University, California, April 19, 1989.
    


20. 1989 PERSPECTIVE ON RISC ARCHITECTURE. Monterey Institute of Technology, Queretaro, Mexico, July 10, 1989.
    


21. 1989 RECENT DEVELOPMENTS IN VLSI TECHNOLOGY, CONCITEQ. Technology Institute of the State of Queretaro, Queretaro, Mexico, July 17, 1989.
    


22. 1989 STUDY OF FAST ADDER IMPLEMENTATIONS. Electrical Engineering Department Seminar, Stanford University, California, December 13, 1989.